Part Number Hot Search : 
1N4753A ODUCT MC332 T30BB6 K4H5616 5KP28 40240 PM6600
Product Description
Full Text Search
 

To Download IRS21271SPBF Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  features floating channel designed for bootstrap operation fully operational to +600 v tolerant to negative transient voltage dv/dt immune application-specific gate drive range: motor drive: 12 v to 20 v (irs2127/irs2128) automotive: 9 v to 20 v (irs21271/irs21281) undervoltage lockout 3.3 v, 5 v, and 15 v input logic compatible fault lead indicates shutdown has occured output in phase with input (irs2127/irs21271) output out of phase with input (irs2128/irs21281) current sensing single channel driver v offset 600 v max. i o +/- 200 ma / 420 ma v out 12 v - 20v 9 v - 20 v (irs2127/ir2128) (irs21271/ir21281) v csth 250 mv or 1.8 v t on/off (typ.) 150 ns & 150 ns typical connection www.irf.com 1 packages irs2127/irs21271 irs2128/irs21281 8-lead pdip 8-lead soic irs212(7, 71, 8, 81)(s)pbf data sheet no. pd60299 description the irs2127/irs2128/irs21271/irs21281 are high voltage, high speed power mosfet and igbt drivers. proprietary hvic and latch immune cmos technologies enable ruggedized monolithic construc- tion. the logic input is compatible with standard cmos or lsttl outputs, down to 3.3 v. the protec- tion circuity detects over-current in the driven power transistor and terminates the gate drive voltage. an open drain fault signal is provided to indicate that an over-current shutdown has occurred. the output product summary v cc v b cs ho v s com in fault v cc in fault v cc v b cs ho v s com in fault v cc in fault (refer to lead assignments for correct pin configuration). these diagrams show electrical connections only. please refer to our application notes and designtips for proper circuit board layout. driver features a high pulse current buffer stage designed for minimum cross-conduction. the floating chan- nel can be used to drive an n-channel power mosfet or igbt in the high-side or low-side configuration which operates up to 600 v. ? rohs compliant
irs212(7, 71, 8, 81)(s)pbf www.irf.com 2 symbol definition min. max. units v b high-side floating supply voltage -0.3 625 v s high-side floating offset voltage v b - 25 v b + 0.3 v ho high-side floating output voltage v s - 0.3 v b + 0.3 v cc logic supply voltage -0.3 25 v v in logic input voltage -0.3 v cc + 0.3 v flt fault output voltage -0.3 v cc + 0.3 v cs current sense voltage v s - 0.3 v b + 0.3 dv s /dt allowable offset supply voltage transient ? 50 v/ns p d package power dissipation @ t a +25 c 8-lead dip ? 1.0 8-lead soic ? 0.625 rth ja thermal resistance, junction to ambient 8-lead dip ? 125 8-lead soic ? 200 t j junction temperature ? 150 t s storage temperature -55 150 t l lead temperature (soldering, 10 seconds) ? 300 absolute maximum ratings absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. all voltage param- eters are absolute voltages referenced to com. the thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. symbol definition min. max. units v b high-side floating supply voltage (irs2127/irs2128) v s + 12 v s + 20 (irs21271/irs21281) v s + 9 v s + 20 v s high-side floating offset voltage note 1 600 v ho high-side floating output voltage v s v b v cc logic supply voltage 10 20 v in logic input voltage 0 v cc v flt fault output voltage 0 v cc v cs current sense signal voltage v s v s + 5 t a ambient temperature -40 125 c note 1: logic operational for v s of -5 v to +600 v. logic state held for v s of -5 v to -v bs . (please refer to the design tip dt97-3 for more details). recommended operating conditions the input/output logic timing diagram is shown in fig. 1. for proper operation the device should be used within the recommended conditions. the v s offset rating is tested with all supplies biased at 15 v differential. c/w w c v
www.irf.com 3 irs212(7, 71, 8, 81)(s)pbf symbol definition min. typ.max.units test conditions v ih logic ?1? input voltage (irs2127/irs21271) logic ?0? input voltage (irs2128/irs21281) v il logic ?0? input voltage (irs2127/irs21271) logic ?1? input voltage (irs2128/irs21281) v csth+ cs input positive (irs2127/irs2128) 180 250 320 mv going threshold (irs21271/irs21281) 1.5 1.8 2.1 v oh high level output voltage, v bias - v o ? 0.05 0.2 v ol low level output voltage, v o ? 0.02 0.1 i lk offset supply leakage current ? ? 50 vb = vs = 600 v i qbs quiescent v bs supply current ? 300 800 i qcc quiescent v cc supply current ? 60 120 i in+ logic ?1? input bias current ? 7.0 15 vin = 5 v i in- logic ?0? input bias current ? ? 5.0 v in = 0 v i cs+ ?high? cs bias current ? ? 5.0 v cs = 3 v i cs- ?high? cs bias current ? ? 5.0 v cs = 0 v v bsuv+ v bs supply undervoltage (irs2127/irs2128) 8.8 10.3 11.8 positive going threshold (irs21271/irs21281) 6.3 7.2 8.2 v bsuv- v bs supply undervoltage (irs2127/irs2128) 7.5 9.0 10.6 negative going threshold (irs21271/irs21281) 6.0 6 .8 7.7 i o+ output high short circuit pulsed current 200 290 ? v o = 0 v, v in = 5 v pw 10 s i o- output low short circuit pulsed current 420 600 ? v o = 15 v, v in = 0 v pw 10 s r on,flt fault - low on resistance ? 125 ? w symbol definition min. typ.max.units test conditions t on turn-on propagation delay ? 150 200 v s = 0 v t off turn-off propagation delay ? 150 200 v s = 600 v t r turn-on rise time ? 80 130 t f turn-off fall time ? 40 65 ns t bl start-up blanking time 550 750 950 t cs cs shutdown propagation delay ? 65 360 t flt cs to fault pull-up propagation delay ? 270 510 dynamic electrical characteristics v bias (v cc , v bs ) = 15 v, c l = 1000 pf and t a = 25 c unless otherwise specified. the dynamic electrical characteristics are measured using the test circuit shown in fig. 3. static electrical characteristics v bias (v cc , v bs ) = 15 v and t a = 25 c unless otherwise specified. the v in , v th, and i in parameters are referenced to com. the v o and i o parameters are referenced to v s . 2.5 ? ? v in = 0 v or 5 v a ma v v ? ? 0.8 v cc = 10 v to 20 v i o = 2 ma v
irs212(7, 71, 8, 81)(s)pbf www.irf.com 4 functional block diagram irs2127/irs21271 down shifter pulse gen uv detect pulse filter pulse gen buffer hv level v b ho v s cs r s r q v cc in up shifters com fault - + pulse filter v b delay s q r q r s shift functional block diagram irs2128/irs21281 down shifter pulse gen uv detect pulse filter pulse gen buffer hv level v b ho v s cs r s r q v cc in up shifters com fault - + pulse filter v b delay s q r q r s shift 5v
www.irf.com 5 irs212(7, 71, 8, 81)(s)pbf lead definitions symbol description v cc logic and gate drive supply in logic input for gate driver output (ho), in phase with ho (irs2127/irs21271) out of phase with ho (irs2128/irs21281) indicates over-current shutdown has occurred, negative logic com logic ground v b high-side floating supply ho high-side gate drive output v s high-side floating supply return cs current sense input to current sense comparator lead assignments 8 lead pdip 8 lead soic irs2127/irs21271 irs2127s/irs21271s fault 8 lead pdip 8 lead soic irs2128/irs21281 irs2128s/irs21281s 1 2 3 4 8 7 6 5 v cc i n fault com v b ho c s v s 1 2 3 4 8 7 6 5 v cc i n fault com v b ho c s v s 1 2 3 4 8 7 6 5 v cc i n fault com v b ho c s v s 1 2 3 4 8 7 6 5 v cc i n fault com v b ho c s v s
irs212(7, 71, 8, 81)(s)pbf www.irf.com 6 figure 4. cs shutdown waveform definitions 90% cs v csth t cs ho figure 5. cs to fault waveform definitions 90% cs v csth t flt fault figure 2. switching time waveform definition in ho 90% 90% 10% 10% 50% 50% t r t f t on t off 50% 50% in (irs2128/ irs21281) (irs2127/ irs21271) figure 1. input/output timing diagram ho cs in fault in (irs2128/ irs21281) (irs2127/ irs21271) figure 3. start-up blanking time waveform definitions ho cs in t bl 90% 50% fault 50% (irs2127/ irs21271) in (irs2128/ irs21281)
www.irf.com 7 irs212(7, 71, 8, 81)(s)pbf typ max 0 50 100 150 200 250 300 -50 -25 0 25 50 75 100 125 temperature (c) figure 6a. turn-on delay time vs. typ max 0 50 100 150 200 250 300 10 12 14 16 18 20 supply voltage (v) figure 6b. turn-on delay time vs. voltage typ max 0 50 100 150 200 250 300 -50 -25 0 25 50 75 100 125 temperature (c) turn- off delay time (ns) figure 7a. turn-off delay time vs. typ max 0 50 100 150 200 250 10 12 14 16 18 20 supply voltage (v) figure 7b. turn-off delay time vs. voltage t ur n- on d elay t ime ( ns ) t ur n- on d elay t ime ( ns ) turn- off delay time (ns) temperature temperature
irs212(7, 71, 8, 81)(s)pbf www.irf.com 8 typ max 0 20 40 60 80 100 120 140 160 180 -50 -25 0 25 50 75 100 125 temperature (c) t u r n - o n r i s e time (ns) figure 8a. turn-on rise time vs. t em perature typ max 0 20 40 60 80 100 120 140 160 180 10 12 14 16 18 20 supply voltage (v) figure 8b. turn-on rise time vs. voltage typ max 0 10 20 30 40 50 60 70 80 90 -50 -25 0 25 50 75 100 125 temperature (c) figure 9a. turn-off fall time vs. typ max 0 10 20 30 40 50 60 70 80 10 12 14 16 18 20 supply voltage (v) figure 9b. turn-off fall time vs. voltage t u r n - o f f f a ll t im e ( n s ) t u r n - o n r i s e time (ns) t u r n - o f f f a ll t im e ( n s ) temperature t em perature temperature
www.irf.com 9 irs212(7, 71, 8, 81)(s)pbf min typ max 0 200 400 600 800 1000 1200 -50 -25 0 25 50 75 100 125 temperature (c) s t a r t - u p b l a n k i n g t i m e ( n s ) figure 10 a. start-up blanking time vs. min typ max 0 200 400 600 800 1000 1200 10 12 14 16 18 20 supply voltage (v) figure 10b. start-up blanking time vs. voltage typ max 0 50 100 150 200 250 300 350 400 450 500 -50 -25 0 25 50 75 100 125 temperature (c) c s s h u t d o w n p r o p . d e l a y ( n s ) figure 11a. cs shutdown prop. delay vs. typ max 0 50 100 150 200 250 300 350 400 10 12 14 16 18 20 supply voltage (v) figure 11b. cs shutdown prop. delay vs. s t a r t - u p b l a n k i n g t i m e ( n s ) c s s h u t d o w n p r o p . d e la y ( n s ) temperature temperature voltage
irs212(7, 71, 8, 81)(s)pbf www.irf.com 10 typ max 0 100 200 300 400 500 600 700 800 -50 -25 0 25 50 75 100 125 temperature (c) c s t o f a u l t p u l l - u p p r o p . d e l a y ( n s ) figure 12a. cs to fault pull-up prop. delay typ max 0 100 200 300 400 500 600 10 12 14 16 18 20 supply voltage (v) min 0 0.5 1 1.5 2 2.5 3 -50 -25 0 25 50 75 100 125 temperature (c) l o g i c " 1 " ( " 0 " f o r 2 1 2 8 ) v threshold (v) i h figure 13a. logic "1" ("0" for 2128) v ih threshold min 0 0.5 1 1.5 2 2.5 3 10 12 14 16 18 20 supply voltage (v) l o g i c " 1 " ( " 0 " f o r 2 1 2 8 ) v i h t hreshold (v) figure 13b. logic "1" ("0" for 2128) v ih threshold vs. c s t o f a u l t p u l l - u p p r o p . d e l a y ( n s ) vs . temperature vs. voltage figure 12b. cs to fault pull-up prop. delay voltage vs. temperature
www.irf.com 11 irs212(7, 71, 8, 81)(s)pbf max 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 -50 -25 0 25 50 75 100 125 temperature (c) l o g i c " 0 " ( " 1 " f o r 2 1 2 8 ) v i l t h r e s h o l d ( v ) figure 14a. logic "0" ("1" for 2128) v il max 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 10 12 14 16 18 20 supply voltage (v) l o g i c " 0 " ( " 1 " f o r 2 1 2 8 ) v i l t h r e s h o l d ( v ) figure 14b. logic "0" ("1" for 2128) v il min typ max 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 -50 -25 0 25 50 75 100 125 temperature (c) c s i n p u t p o s i t i v e g o i n g v o l t a g e ( v ) figure 15a. cs input positive goin g voltage min typ max 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 10 12 14 16 18 20 supply voltage (v) figure 15b. cs input positive going voltage vs. cs i n put pos itiv e g o ing vo lt age ( v) threshold threshold vs. voltage vs. temperature vs. temperature voltage
irs212(7, 71, 8, 81)(s)pbf www.irf.com 12 typ max 0 0.05 0.1 0.15 0.2 0.25 0.3 -50 -25 0 25 50 75 100 125 temperature (c) h i g h l e v e l o u t p u t ( i o = 2 m a ) ( v) figure 16a. high level output (i o = 2 ma) typ max 0 0.05 0.1 0.15 0.2 0.25 10 12 14 16 18 20 supply voltage (v) h i g h l e v e l o u t p u t ( i o = 2 m a) (v) figure 16b. high level output (i o = 2 ma) vs. typ max 0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 -50 -25 0 25 50 75 100 125 temperature (c) l o w l e v e l o u t p u t ( i o = 2 m a ) ( v ) figure 17a. low level output (i o = 2 ma) typ max 0 0.02 0.04 0.06 0.08 0.1 0.12 10 12 14 16 18 20 supply voltage (v) l o w l e v e l o u t p u t ( i o = 2 m a) (v) figure 17b. low level output (i o = 2 ma) vs. vs. temperature voltage vs. temperature voltage
www.irf.com 13 irs212(7, 71, 8, 81)(s)pbf max 0 10 20 30 40 50 60 70 80 90 100 -50 -25 0 25 50 75 100 125 temperature (c) o ff s e t supply leak a ge cur r ent ( a) figure 18a. offset supply leakage current vs. temperature max 0 10 20 30 40 50 60 0 100 200 300 400 500 600 supply voltage (v) v b s s u p p l y c u r r e n t ( a ) figure 18b. high-side floating well offset supply leakage vs. voltage typ max 0 100 200 300 400 500 600 -50 -25 0 25 50 75 100 125 temperature (c) v b s s u p p l y c u r r e n t ( a ) figure 19a. v bs supply current vs. typ max 0 100 200 300 400 500 600 700 10 12 14 16 18 20 supply voltage (v) v b s s u p p l y c u r r e n t ( a ) figure 19b. v bs supply current vs. voltage temperature
irs212(7, 71, 8, 81)(s)pbf www.irf.com 14 typ max 0 20 40 60 80 100 120 140 160 -50 -25 0 25 50 75 100 125 temperature (c) v c c s u p p l y c u r r e n t ( a ) figure 20a. v cc supply current vs. typ max 0 20 40 60 80 100 120 140 160 180 10 12 14 16 18 20 supply voltage (v) v c c s u p p l y c u r r e n t ( a ) figure 20b. v cc supply current vs. voltage typ max 0 2 4 6 8 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 temperature (c) l o g i c " 1 " i n p u t b i a s c u r r e n t ( a ) figure 21a. logic "1" input bias current vs. typ max 0 2 4 6 8 10 12 14 16 10 12 14 16 18 20 supply voltage (v) l o g i c " 1 " i n p u t b i a s c u r r e n t ( a ) figure 21b. logic "1" input bias current vs. temperature temperature voltage
www.irf.com 15 irs212(7, 71, 8, 81)(s)pbf max 0 1 2 3 4 5 6 -50 -25 0 25 50 75 100 125 temperature (c) l o g i c " 0 " i n p u t b i a s c u r r e n t ( a ) figure 22a. logic "0" input bias current vs. max 0 1 2 3 4 5 6 10 12 14 16 18 20 supply voltage (v) figure 22b. logic "0" input bias current vs. max 0 1 2 3 4 5 6 -50 -25 0 25 50 75 100 125 temperature (c) l o g i c " 1 " c s b i a s c u r r e n t ( a ) figure 23a. logic "1" cs bias current vs. max 0 1 2 3 4 5 6 10 12 14 16 18 20 supply voltage (v) l o g i c " 1 " c s b i a s c u r r e n t ( a ) figure 23b. logic "1" cs bias current vs. logic " 0" in put bias c ur r en t ( a) voltage temperature temperature voltage
irs212(7, 71, 8, 81)(s)pbf www.irf.com 16 max 0 1 2 3 4 5 6 -50 -25 0 25 50 75 100 125 temperature (c) l o g i c " 0 " c s b i a s c u r r e n t ( a ) figure 24a. logic "0" cs bias current vs. max 0 1 2 3 4 5 6 10 12 14 16 18 20 supply voltage (v) l o g i c " 0 " c s b i a s c u r r e n t ( a ) figure 24b. logic "0" cs bias current vs. min typ max 0 2 4 6 8 10 12 14 -50 -25 0 25 50 75 100 125 temperature (c) v b s u v t h r e s h o l d ( + ) ( v ) figure 25a. v bs uv threshold (+) vs. min typ max 0 2 4 6 8 10 12 14 10 12 14 16 18 20 supply voltage (v) v b s u v t h r e s h o l d ( + ) ( v ) figure 25b. v bs uv threshold (+) vs. voltage temperature temperature voltage
irs212(7, 71, 8, 81)(s)pbf www.irf.com 17 min typ max 0 2 4 6 8 10 12 -50 -25 0 25 50 75 100 125 temperature (c) v b s u v t h r e s h o l d ( - ) ( v ) figure 26a. v bs uv threshold (-) vs. temperature min typ max 0 2 4 6 8 10 12 10 12 14 16 18 20 supply voltage (v) v b s u v t h r e s h o l d ( - ) ( v ) figure 26b. v bs uv threshold (-) vs. voltage min typ 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 -50 -25 0 25 50 75 100 125 temperature (c) o u t p u t s o u r c e c u r r e n t ( a ) figure 27a. output source current vs. temperature min typ 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 10 12 14 16 18 20 o u t p u t s o u r c e c u r r e n t ( a ) supply voltage (v) figure 27b. output source current vs. voltage
www.irf.com 18 irs212(7, 71, 8, 81)(s)pbf min typ 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 -50 -25 0 25 50 75 100 125 temperature (c) o u t p u t s i n k c u r r e n t ( a ) figure 28a. output sink current vs. temperature min typ 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 10 12 14 16 18 20 supply voltage (v) o u t p u t s i n k c u r r e n t ( a ) figure 28b. output sink current vs. voltage
www.irf.com 19 irs212(7, 71, 8, 81)(s)pbf 01-6014 01-3003 01 (ms-001ab) 8-lead pdip case outlines 01-6027 01-0021 11 (ms-012aa) 8-lead soic 8 7 5 6 5 d b e a e 6x h 0.25 [.010] a 6 4 3 1 2 4. outline conforms to jedec outline ms-012aa. notes: 1. dimensioning & tolerancing per asme y14.5m-1994. 2. controlling dimension: millimeter 3. dimensions are shown in millimeters [inches]. 7 k x 45 8x l 8x c y footprint 8x 0.72 [.028] 6.46 [.255] 3x 1.27 [.050] 8x 1.78 [.070] 4. outline conforms to jedec outline ms-012aa. 5 dimension does not include mold protrusions. 6 dimension does not include mold protrusions. mold protrusions not to exceed 0.25 [.010]. 7 dimension is the length of lead for soldering to a substrate. mold protrusions not to exceed 0.15 [.006]. 0.25 [.010] cab e1 a a1 8x b c 0.10 [.004] e1 d e y b a a1 h k l .189 .1497 0 .013 .050 basic .0532 .0040 .2284 .0099 .016 .1968 .1574 8 .020 .0688 .0098 .2440 .0196 .050 4.80 3.80 0.33 1.35 0.10 5.80 0.25 0.40 0 1.27 basic 5.00 4.00 0.51 1.75 0.25 6.20 0.50 1.27 min max millimeters inches min max dim 8 e c .0075 .0098 0.19 0.25 .025 basic 0.635 basic
irs212(7, 71, 8, 81)(s)pbf www.irf.com 20 carrier tape dimension for 8soicn code min max min max a 7.90 8.10 0.311 0.318 b 3.90 4.10 0.153 0.161 c 11.70 12.30 0.46 0.484 d 5.45 5.55 0.214 0.218 e 6.30 6.50 0.248 0.255 f 5.10 5.30 0.200 0.208 g 1.50 n/a 0.059 n/a h 1.50 1.60 0.059 0.062 metric imperial reel dimensions for 8soicn code min max min max a 329.60 330.25 12.976 13.001 b 20.95 21.45 0.824 0.844 c 12.80 13.20 0.503 0.519 d 1.95 2.45 0.767 0.096 e 98.00 102.00 3.858 4.015 f n/a 18.40 n/a 0.724 g 14.50 17.10 0.570 0.673 h 12.40 14.40 0.488 0.566 metric imperial e f a c d g a b h note : controlling dimension in mm loaded tape feed direction a h f e g d b c tape & reel 8-lead soic
www.irf.com 21 irs212(7, 71, 8, 81)(s)pbf order information 8-lead pdip irs2127pbf 8-lead pdip irs21271pbf 8-lead soic irs2127spbf 8-lead soic IRS21271SPBF 8-lead soic tape & reel irs2127strpbf 8-lead soic tape & reel irs21271strpbf leadfree part marking information lead free released non-lead free released part number date code irxxxxxx yww? ?xxxx pin 1 identifier ir logo lot code (prod mode - 4 digit spn code) assembly site code per scop 200-002 p ? marking code s the soic-8 is msl2 qualified. this product has been designed and qualified for the industrial level. qualification standards can be found at www.irf.com ir world headquarters: 233 kansas st., el segundo, california 90245 tel: (310) 252-7105 data and specifications subject to change without notice. 6/27/2007 8-lead pdip irs2128pbf 8-lead pdip irs21281pbf 8-lead soic irs2128spbf 8-lead soic irs21281spbf 8-lead soic tape & reel irs2128strpbf 8-lead soic tape & reel irs21281strpbf


▲Up To Search▲   

 
Price & Availability of IRS21271SPBF

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X